SY89474U precision lvds 2:1 multiplexer with 1:2 fanout and internal termination precision edge is a registered trademark of micrel, inc. micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? te l +1 (408) 944-0800 ? fax + 1 (408) 474-1000 ? http://www.micre l.com august 2005 m9999-081105 hbwhelp@micrel.com or (408) 955-1690 general description the SY89474U is a 2.5v precision, high-speed 2:1 differential mux capable of processing clocks up to 2.5ghz and data up to 2.5gbps. the differential input includes micrel?s unique, 3-pin input termination architecture that directly interfaces to any differential signal (ac- or dc-coupled) as small as 100mv (200mv pp ) without any level shifting or termination resistor networks in the signal path. the output is 325mv lvds with fast rise/fall times guaranteed to be less than 150ps. the SY89474U operates from a 2.5v 5% supply and is guaranteed over the full industrial temperature range of -40c to +85c. the SY89474U is part of micrel?s high- speed, precision edge ? product line. for multiple clock switchover solutions, please refer to the sy89840u? sy89845u family. all support documentation can be found on micrel?s web site at: www.micrel.com . functional block diagram precision edge ? features ? selects between two input channels and provides two copies of the selected input ? guaranteed ac performance over temperature and supply voltage: ? dc to 2.5gbps data throughput ? dc to 2.5ghz f max (clock) ? <470ps in-to-out tpd ? <150ps t r /t f ? <20ps output-to-output skew ? unique, patent-pending input isolation design minimizes crosstalk ? ultra-low jitter design: ? <1ps rms random jitter ? <10ps pp deterministic jitter ? <1ps rms cycle-to-cycle jitter ? <10ps pp total jitter (clock) ? <0.7ps rms crosstalk induced jitter ? unique patent-pending input termination and vt pin accepts dc- and ac-coupled inputs (cml, pecl, lvds) ? 325mv lvds output swing ? 2.5v 5% supply voltage ? ? 40c to +85c industrial temperature range ? available in 24-pin (4mm x 4mm) qfn package applications ? clock switchover ? data distribution markets ? lan/wan ? enterprise servers ? ate ? test and measurement
micrel, inc. SY89474U august 2005 2 m9999-081105 hbwhelp@micrel.com or (408) 955-1690 ordering information (1) part number package type operating range package marking lead finish SY89474Umg qfn-24 industrial 474u with pb-free bar-line indicator nipdau pb-free SY89474Umgtr (2) qfn-24 industrial 474u with pb-free bar-line indicator nipdau pb-free notes: 1. contact factory for die availability. dice are guaranteed at ta = 25c, dc electricals only. 2. tape and reel. pin configuration 24-pin qfn
micrel, inc. SY89474U august 2005 3 m9999-081105 hbwhelp@micrel.com or (408) 955-1690 pin description pin number pin name pin function 5, 2, 23, 20 in0, /in0 in1, /in1 differential inputs: these input pairs are the differential signal inputs to the device. they accept ac- or dc-coupled signals as small as 100mv (200mvpp). note that these inputs will default to an undetermined state if left open. each pin of a pair internally terminates to a vt pin through 50 ? . please refer to the ?input interface applications? section for more details. 3, 21 vref-ac0 , vref-ac1 reference voltage: these outputs bias to v cc -1.2v. they are used for ac- coupling inputs in and /in. connect vref-ac directly to the corresponding vt pin. bypass with 0.01f low esr capacitor to vcc. maximum sink/source current is 1.5ma. due to the limited dr ive capability, the vref-ac pin is only intended to drive its respective vt pin. please refer to the ?input interface applications? section for more details. 4, 22 vt0 , vt1 input termination center-tap: each side of the differential input pair terminates to a vt pin. the vt0 and vt1 pins provide a center-tap to a termination network for maximum interface flexibility. please refer to the ?input interface applications? section for more details. 1, 6, 9, 10, 13, 19, 24 vcc positive power supply: connect to +2.5v 5% power supply. bypass with 0.1f//0.01f low esr capacitors as close to vcc pins as possible. 7, 8 11, 12 q0, /q0 q1, /q1 differential outputs: these differential lv ds output pairs are a logic function of the in0, in1, and sel inputs. please refe r to the truth table below for details. unused output pairs should be terminated with 100 ? across the outputs. 15 sel this single-ended ttl/cmos-compatible input selects the inputs to the multiplexer. note that this inpu t is internally connected to a 25k ? pull-up resistor and will default to a logic high state if left open. v th = v cc /2. please refer to the ?timing diagram? section for more details. 14, 17, 18 gnd, exposed pad ground: ground pins and exposed pad mu st be connected to the same ground plane. truth table inputs outputs in0 /in0 in1 /in1 sel q /q 0 1 x x 0 0 1 1 0 x x 0 1 0 x x 0 1 1 0 1 x x 1 0 1 1 0
micrel, inc. SY89474U august 2005 4 m9999-081105 hbwhelp@micrel.com or (408) 955-1690 absolute maximum ratings (1) supply voltage (v cc )........................................... -0.5v to +4.0v input voltage (v in ) ...................................................-0.5 v to v cc termination current in, /in ....................................................................... 50ma v t ...........................................................................100ma v ref-ac current source/sink current on v ref-ac ..................................2ma lead temperature (solde ring, 20 sec. ) .......................... + 260c storage temperature (t s ) ..................................- 65c to 150 c operating ratings (2) supply voltage (v cc )........................... +2.375v to +2.625v ambient temperature (t a ) ......................... ?40c to +85c package thermal resistance (3) qfn ( ja ) still-air .............................................................50c/w qfn ( jb ) junction-to- board.............................................30c/w dc electrical characteristics (4) t a = ?40c to +85c; unless otherwise stated. symbol parameter condition min typ max units v cc power supply 2.375 2.5 2.625 v i cc power supply current no load, max v cc . 80 110 ma r in input resistance (in-to-v t ) 45 50 55 ? r diff_in differential input resistance (in-to-/in) 90 100 110 ? v ih input high voltage (in, /in) 1.2 v cc v v il input low voltage (in, /in) 0 v ih -0.1 v v in input voltage swing (in, /in) see figure 1a. note 5. 0.1 v cc v v diff_in differential input voltage swing |in-/in| see figure 1b. 0.2 v v t_in in-to-v t (in, /in) 1. 28 v v ref-ac output reference voltage v cc -1.3 v cc -1.2 v cc -1.1 v notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional oper ation is not implied at conditions other than those deta iled in the operational sections of this data sheet. exposure to absolute maximum ra tings conditions for extended periods may affect device reliability. 2. the data sheet limits are not guaranteed if t he device is operated beyond the operating ratings. 3. package thermal resistance assumes exposed pad is soldered (o r equivalent) to the devices most negative potential on the pcb . ja and jb values are determined for a 4-layer board in still air unless otherwise stated. 4. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been establishe d. 5. v in (max) is specified when v t is floating.
micrel, inc. SY89474U august 2005 5 m9999-081105 hbwhelp@micrel.com or (408) 955-1690 lvds outputs dc electrical characteristics (6) v cc = 2.5v 5%; t a = -40c to + 85c; r l = 100 ? across output pair; unl ess otherwise stated symbol parameter condition min typ max units v out output voltage swing q, /q see figure 1a 250 325 mv v diff_out differential output voltage swing q, /q see figure 1b 500 650 mv v ocm output common mode voltage 1.125 1.275 v v ocm change in v os between complementary output states -50 +50 mv lvttl/cmos dc electri cal characteristics (6) v cc = 2.5v 5%; t a = -40c to + 85c; unless otherwise stated symbol parameter condition min typ max units v ih input high voltage 2.0 v v il input low voltage 0.8 v i ih input high current -125 30 a i il input low current -300 a notes: 6. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been establishe d.
micrel, inc. SY89474U august 2005 6 m9999-081105 hbwhelp@micrel.com or (408) 955-1690 ac electrical characteristics (7) v cc = 2.5v 5%; t a = -40c to + 85c; r l = 100 ? across output pair; unl ess otherwise stated symbol parameter condition min typ max units nrz data 2.5 3.2 gbps f max maximum operating frequency v out 200mv clock 2.5 4 ghz 220 320 470 ps t pd differential propagation delay in-to-q sel-to-q v th = v cc /2 200 350 550 ps t pd tempco differential propagation delay temperature coefficient 158 fs/ o c output-to-output skew note 8 5 20 ps t skew part-to-part skew note 9 200 ps note 10 1 ps rms data random jitter deterministic jitter note 11 10 ps pp clock cycle-to-cycle jitter note 12 1 ps rms total jitter note 13 10 ps pp t jitter crosstalk-induced jitter note 14 0.7 ps rms t r, t f output rise/fall time (20% to 80% ) at full output swing. 30 150 ps notes: 7. high-frequency ac-parameters are guar anteed by design and characterization. 8. output-to-output skew is measured between tw o different outputs under identical transitions. 9. part-to-part skew is defined for two parts with identical pow er supply voltages, at the same temperature, and with no skew o f the edges at the respective inputs. 10. random jitter is measured with a k28.7 pattern, measured at f max . 11. deterministic jitter is measured with both k28.5 and 2 23 -1 prbs pattern, measured at f max . 12. cycle-to-cycle jitter definition: the va riation of periods between adjacent cycles, t n ? t n-1 where t is the time between rising edges of the output signal. 13. total jitter definition: with an ideal clock input of frequency micrel, inc. SY89474U august 2005 7 m9999-081105 hbwhelp@micrel.com or (408) 955-1690 typical operating characteristics v cc = 2.5v 5%; v in > 400mv; t a = 25c, r l = 100 ? across output pair; unless otherwise stated. functional characteristics v cc = 2.5v 5%; v in > 400mv; t a = 25c, r l = 100 ? across output pair; unless otherwise stated.
micrel, inc. SY89474U august 2005 8 m9999-081105 hbwhelp@micrel.com or (408) 955-1690 single-ended and di fferential swings figure 1a. single-ended voltage swing figure 1b. differential voltage swing timing diagrams input and output stages figure 2. simplified differential input stage
micrel, inc. SY89474U august 2005 9 m9999-081105 hbwhelp@micrel.com or (408) 955-1690 input interface applications figure 3a. lvpecl interface (dc-coupled) figure 3b. lvpecl interface (ac-coupled) option: may connect v t to v cc . figure 3c. cml interface (dc-coupled) figure 3d. cml interface (ac-coupled) figure 3e. lvds interface (dc-coupled)
micrel, inc. SY89474U august 2005 10 m9999-081105 hbwhelp@micrel.com or (408) 955-1690 lvds output interface applications lvds specifies a small swing of 325mv typical, on a nominal 1.20v common mode above ground. the common mode voltage has tight limits to permit large variations in ground between an lvds driver and receiver. also, change in common mode voltage, as a function of data input, is kept to a minimum, to keep emi low. figure 4a. lvds differential measurement figure 4b. lvds mode measurement related product and support information part number function data sheet link sy89473u precision lvpecl 2:1 multiplexer with 1:2 fanout and internal termination www.micrel.com/product-i nfo/products/sy89473u.shtml hbw solutions new products and applications www.micrel.com/product-inf o/products/solutions.shtml
micrel, inc. SY89474U august 2005 11 m9999-081105 hbwhelp@micrel.com or (408) 955-1690 package information 24-pin (4mm x 4mm) qfn micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http:/www.micrel.com the information furnished by micrel in this data sheet is belie ved to be accurate and reliable. however, no responsibility is a ssumed by micrel for its use. micrel reserves the right to change circuitry and specificati ons at any time without notification to the customer. micrel products are not designed or authori zed for use as components in life support app liances, devices or systems where malfu nction of a product can reasonably be expected to result in personal injury. li fe support devices or systems are devices or systems that (a ) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to resul t in a significant injury to the user. a purchaser?s use or sale of micrel produc ts for use in life support applianc es, devices or systems is a pu rchaser?s own risk and purchaser agrees to fully indemnify micrel fo r any damages resulting from such use or sale. ? 2005 micrel, incorporated.
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